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High-speed ADCs (≥10 MSPS)

ADS5272

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Eight-Channel, 12-Bit, 65-MSPS Analog-to-Digital Converter (ADC)

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Data sheet

ADS5272

ACTIVE
Data sheet Order now

Product details

Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 8 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 983 Architecture Pipeline SNR (dB) 71.2 ENOB (bit) 11.5 SFDR (dB) 90 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 8 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 983 Architecture Pipeline SNR (dB) 71.2 ENOB (bit) 11.5 SFDR (dB) 90 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PFP) 80 196 mm² 14 x 14
  • Maximum Sample Rate: 65MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 983mW
    External Reference: 917mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 71.1dBFS SNR at 5MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • TQFP-80 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners
  • Maximum Sample Rate: 65MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 983mW
    External Reference: 917mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 71.1dBFS SNR at 5MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • TQFP-80 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners

The ADS5272 is a high-performance, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5272 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.

The ADS5272 is a high-performance, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5272 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.
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Technical documentation

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Type Title Date
* Data sheet 8-Channel, 12-Bit, 65MSPS Analog-to-Digital Converter with Serial LVDS Interface datasheet (Rev. C) 06 Jan 2009
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 Apr 2024
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs 04 Sep 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
Application note Ultrasound Receive Chain Evaluation Module 14 Jul 2006
EVM User's guide ADS527xEVM User's Guide (Rev. A) 18 Oct 2005
Application note Interfacing the VCA8613 with High-Speed ADCs 05 Apr 2005
Application note Interfacing the VCA8617 with High-Speed ADCs 05 Apr 2005
Application note Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x 23 Feb 2005
Application note LVDS Outputs on the ADS527x 10 Jun 2004

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